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CVE-2025-45006
Published: Jul 1, 2025
Modified: Jul 2, 2025
PUBLISHED
Description
Improper mstatus.SUM bit retention (non-zero) in Open-Source RISC-V Processor commit f517abb violates privileged spec constraints, enabling potential physical memory access attacks.
| Vendor | Product | Versions |
|---|---|---|
n/a | n/a | affected n/a |
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