CVE-2025-54515
Published: Nov 23, 2025
Modified: Dec 19, 2025
Description
The Secure Flag passed to Versal™ Adaptive SoC’s Trusted Firmware for Cortex®-A processors (TF-A) for Arm’s Power State Coordination Interface (PSCI) commands were incorrectly set to secure instead of using the processor’s actual security state. This would allow the PSCI requests to appear they were from processors in the secure state instead of the non-secure state.
| Vendor | Product | Versions |
|---|---|---|
AMD | Versal™ Adaptive SoC Devices | unaffected 2025.2 |
AMD | Versal™ RF Series | unaffected 2025.2 |
AMD | Versal™ AI Edge Series | unaffected 2025.2 |
AMD | Versal™ Prime Series | unaffected 2025.2 |
AMD | Versal™ Premium Series | unaffected 2025.2 |
AMD | Versal™ AI Core Series | unaffected 2025.2 |
AMD | Versal™ HBM Series | unaffected 2025.2 |
AMD | Alveo™ V80 Compute Accelerator | unaffected 2025.2 |
Weaknesses (CWE)
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