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CWE-1191

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CWE-1191

On-Chip Debug and Test Interface With Improper Access Control

Base
Stable

Description

The chip does not implement or does not correctly perform access control to check whether users are authorized to access internal registers and test modes through the physical debug/test interface.

{"xhtml:p":["A device's internal information may be accessed through a scan chain of interconnected internal registers, usually through a JTAG interface. The JTAG interface provides access to these registers in a serial fashion in the form of a scan chain for the purposes of debugging programs running on a device. Since almost all information contained within a device may be accessed over this interface, device manufacturers typically insert some form of authentication and authorization to prevent unintended use of this sensitive information. This mechanism is implemented in addition to on-chip protections that are already present.","If authorization, authentication, or some other form of access control is not implemented or not implemented correctly, a user may be able to bypass on-chip protection mechanisms through the debug interface.","Sometimes, designers choose not to expose the debug pins on the motherboard. Instead, they choose to hide these pins in the intermediate layers of the board. This is primarily done to work around the lack of debug authorization inside the chip. In such a scenario (without debug authorization), when the debug interface is exposed, chip internals are accessible to an attacker."]}

Parent Weaknesses (ChildOf)

Common Consequences

Scope

Confidentiality

Impact

Read Application Data

Scope

Confidentiality

Impact

Read Memory

Scope

Authorization

Impact

Execute Unauthorized Code or Commands

Scope

Integrity

Impact

Modify Memory

Scope

Integrity

Impact

Modify Application Data

Scope

Access Control

Impact

Bypass Protection Mechanism

Potential Mitigations

Architecture and Design

If feasible, the manufacturer should disable the JTAG interface or implement authentication and authorization for the JTAG interface. If authentication logic is added, it should be resistant to timing attacks. Security-sensitive data stored in registers, such as keys, etc. should be cleared when entering debug mode.

CVE-2019-18827

chain: JTAG interface is not disabled (CWE-1191) during ROM code execution, introducing a race condition (CWE-362) to extract encryption keys

Applicable Platforms

Not Language-Specific

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