CWE-1342
Information Exposure through Microarchitectural State after Transient Execution
Description
The processor does not properly clear microarchitectural state after incorrect microcode assists or speculative execution, resulting in transient execution.
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Parent Weaknesses (ChildOf)
Common Consequences
Scope
Impact
Modify Memory, Read Memory, Execute Unauthorized Code or Commands
Potential Mitigations
Hardware ensures that no illegal data flows from faulting micro-ops exists at the microarchitectural level.
Include instructions that explicitly remove traces of unneeded computations from software interactions with microarchitectural elements e.g. lfence, sfence, mfence, clflush.
CVE-2020-0551Load value injection in some processors utilizing speculative execution may allow an authenticated user to enable information disclosure via a side-channel with local access.
Applicable Platforms
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